{"id":32148,"date":"2026-05-18T09:00:00","date_gmt":"2026-05-18T08:00:00","guid":{"rendered":"https:\/\/www.engineernewsnetwork.com\/blog\/?p=32148"},"modified":"2026-05-06T16:17:21","modified_gmt":"2026-05-06T15:17:21","slug":"ultra-low-jitter-clock-generator","status":"publish","type":"post","link":"https:\/\/www.engineernewsnetwork.com\/blog\/ultra-low-jitter-clock-generator\/","title":{"rendered":"Ultra-low jitter clock generator"},"content":{"rendered":"\n

Diodes Incorporated introduces the\u00a0PI6CG33A06<\/strong><\/a>, a six-output, ultra-low jitter clock generator designed to meet the demands of PCI Express\u00a0(PCIe) 7.0 specification while maintaining compliance with all previous generations of the PCIe specification. Announced at PCI-SIG\u00a0Developers Conference, the device is targeted for servers, networking equipment, high-performance computing (HPC) systems, and data center platforms that underpin next-generation AI infrastructure.<\/p>\n\n\n\n

The PI6CG33A06 generates precise 25MHz and 100MHz reference clocks and achieves an RMS jitter of less than 30 femtoseconds (fs). This is well below the PCIe 7.0 specification maximum requirement of 67fs and represents a significant improvement over the 80fs level defined by the CK440Q specification from Intel. This ultra-low jitter provides greater design margins, helping engineers manage signal integrity challenges across complex PCB traces and connectors.<\/p>\n\n\n\n

The device provides a stable reference clock for 128.0 GT\/s PCIe links, meeting the bandwidth demands of 800G and 1.6T networking and advanced AI accelerators. Accurate timing at these speeds is critical to maintaining performance and reliability in data center systems.<\/p>\n\n\n\n

The PI6CG33A06 implements Diodes’ proprietary low-power, high-speed current-steering logic (LP-HCSL) technology with integrated termination. This reduces clock-related power consumption by at least 50% compared to traditional HCSL solutions and lowers the thermal footprint in high-density AI server racks. The high level of integration eliminates the need for up to 24 external resistors, reducing BOM cost, simplifying PCB layout, and freeing board space for cooling or additional compute and memory resources.<\/p>\n\n\n\n

Each of the six outputs includes an individual output enable (OE) pin, allowing designers to manage power more effectively and control system operation with greater flexibility. The device supports Intel CK440Q-Lite specifications and is designed for use in existing server clock architectures. This enables designers to reuse proven system designs while improving timing performance and overall system margin.<\/p>\n\n\n\n

“PCIe 7.0 specification is pushing system performance to new heights, particularly for AI and high-bandwidth data center applications,” said Al Yanes, PCI-SIG President and Chairperson. “PCIe clock generators, including Diodes’ PCIe 7.0 clock generator, help streamline system integration to support these advances.”<\/p>\n\n\n\n

The\u00a0PI6CG33A06<\/strong><\/a>\u00a0is available in a 40-pin, 5mm x 5mm VQFN (ZLF) package.<\/p>\n","protected":false},"excerpt":{"rendered":"

Diodes Incorporated introduces the\u00a0PI6CG33A06, a six-output, ultra-low jitter clock generator designed to meet the demands of PCI Express\u00a0(PCIe) 7.0 specification while maintaining compliance with all previous generations of the PCIe specification. Announced at PCI-SIG\u00a0Developers Conference, the device is targeted for servers, networking equipment, high-performance computing (HPC) systems, and data center platforms that underpin next-generation AI …<\/p>\n","protected":false},"author":1,"featured_media":32149,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[104],"tags":[14840,753,14838,14839],"class_list":["post-32148","post","type-post","status-publish","format-standard","has-post-thumbnail","","category-electronics","tag-ai-infrastructure","tag-diodes-incorporated","tag-pi6cg33a06","tag-ultra-low-jitter-clock-generator"],"yoast_head":"\nUltra-low jitter clock generator - Engineer News Network<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.engineernewsnetwork.com\/blog\/ultra-low-jitter-clock-generator\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"Ultra-low jitter clock generator - Engineer News Network\" \/>\n<meta property=\"og:description\" content=\"Diodes Incorporated introduces the\u00a0PI6CG33A06, a six-output, ultra-low jitter clock generator designed to meet the demands of PCI Express\u00a0(PCIe) 7.0 specification while maintaining compliance with all previous generations of the PCIe specification. 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