{"id":33323,"date":"2026-08-14T09:15:00","date_gmt":"2026-08-14T08:15:00","guid":{"rendered":"https:\/\/www.engineernewsnetwork.com\/blog\/?p=33323"},"modified":"2026-08-11T15:40:33","modified_gmt":"2026-08-11T14:40:33","slug":"fpga-ethernet-sensor-bridge","status":"publish","type":"post","link":"https:\/\/www.engineernewsnetwork.com\/blog\/fpga-ethernet-sensor-bridge\/","title":{"rendered":"FPGA Ethernet sensor bridge"},"content":{"rendered":"\n<p class=\"wp-block-paragraph\">The shift toward compact, high\u2011performance edge AI systems is redefining sensor connectivity, pushing developers to deliver power\u2011 and space\u2011efficient architectures that remain secure, scalable and future\u2011ready. To address these challenges, Microchip Technology has released <a href=\"https:\/\/www.microchip.com\/en-us\/development-tool\/mpf200-eth-sensor-bridge\"><strong>Revision 2.0 of its PolarFire FPGA Ethernet Sensor Bridge<\/strong><\/a>, a significantly smaller, production-ready board for standardised sensor integration leveraging <strong><a href=\"https:\/\/www.nvidia.com\/en-us\/technologies\/holoscan-sensor-bridge\/\">NVIDIA Holoscan Sensor Bridge (HSB<\/a>) <\/strong>technology.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The Rev 2.0 HSB-enabled board delivers a 60% smaller form factor, supports twice the number of cameras, is USB\u2011C powered for streamlined rack deployment and is being offered at a lower price point than the first generation. These enhancements enable designers to replace complex, multi\u2011interface sensor connections with scalable, power-efficient 10Gb Ethernet\u2011based architectures reducing overall system cost and bill\u2011of\u2011materials complexity. These benefits are essential for AI driven medical, industrial and humanoid robotics applications powered by NVIDIA edge computing platforms like NVIDIA Jetson and IGX.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Built on PolarFire FPGA technology, the updated design supports up to four cameras, features camera connector that\u2019s compatible with <a href=\"https:\/\/www.nvidia.com\/en-us\/autonomous-machines\/embedded-systems\/\"><strong>NVIDIA Jetson<\/strong><\/a>\u00a0 and includes on\u2011board optical latency measurement circuitry. This helps enable end\u2011to\u2011end latency validation \u2014 from sensor capture to AI inference \u2014 using <a href=\"https:\/\/developer.nvidia.com\/nvidia-latency-display-analysis-tool\"><strong>NVIDIA Latency Display Analysis Tool<\/strong><\/a>.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The board features an FPGA Mezzanine Card (FMC) expansion connector that supports future feature growth and supports interfaces including MIPI CSI\u20112, I\u00b2C, UART and GPIO. The flexible design allows support for multiple sensor and video interfaces such as SLVS\u2011EC 2.0, 12G\u2011SDI, HDMI and DisplayPort, without requiring a redesign of the core platform. A standard PMOD connector further enhances system extensibility.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">\u201cDevelopers want to spend their time building high-value edge AI applications, not stitching together proprietary sensor interfaces,\u201d said Shakeel Peera, vice president of Microchip\u2019s FPGA business unit. \u201cWith low power PolarFire FPGA technology at its core, this second-generation Ethernet sensor bridge delivers a power-efficient, secure foundation in a significantly reduced form factor to help teams move faster from development to deployment in edge AI systems.\u201d<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">Leveraging the power-efficiency, security and reliability of PolarFire FPGAs, the HSB-enabled board delivers real\u2011time, multi\u2011sensor data processing over Ethernet in compact, power\u2011constrained edge environments. Built\u2011in security and safety features help protect edge AI devices and support reliable long\u2011term deployment. Integration with the <a href=\"https:\/\/developer.nvidia.com\/holoscan-sdk\"><strong>NVIDIA Holoscan SDK<\/strong><\/a> helps accelerate development with optimized libraries, AI models and reference applications.<\/p>\n\n\n\n<p class=\"wp-block-paragraph\">The offering includes cameras, cables, a reference design, board schematics and design collateral with RTL development supported by Libero\u00a0SoC Design Suite. Integrated Microchip timing and power-management ICs, including the <a href=\"https:\/\/www.microchip.com\/en-us\/product\/mcp16701\"><strong>MCP16701 PMIC,<\/strong><\/a> are validated for PolarFire FPGAs, helping enable production-ready power and clocking while reducing third-party integration risk. The integrated approach helps reduce system integration risk, shorten development cycles and lower total cost of ownership for Ethernet-based AI inferencing at the edge. It is especially valuable in robotics and industrial automation applications where power efficiency, deterministic latency and compact form factors are critical.<\/p>\n","protected":false},"excerpt":{"rendered":"<p>The shift toward compact, high\u2011performance edge AI systems is redefining sensor connectivity, pushing developers to deliver power\u2011 and space\u2011efficient architectures that remain secure, scalable and future\u2011ready. To address these challenges, Microchip Technology has released Revision 2.0 of its PolarFire FPGA Ethernet Sensor Bridge, a significantly smaller, production-ready board for standardised sensor integration leveraging NVIDIA Holoscan &hellip;<\/p>\n","protected":false},"author":1,"featured_media":33324,"comment_status":"closed","ping_status":"closed","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[104],"tags":[15381,169,15382],"class_list":["post-33323","post","type-post","status-publish","format-standard","has-post-thumbnail","","category-electronics","tag-edge-ai-sensor-connectivity","tag-microchip","tag-rev-2-0-polarfire-fpga-ethernet-sensor-bridge"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>FPGA Ethernet sensor bridge - Engineer News Network<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.engineernewsnetwork.com\/blog\/fpga-ethernet-sensor-bridge\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"FPGA Ethernet sensor bridge - Engineer News Network\" \/>\n<meta property=\"og:description\" content=\"The shift toward compact, high\u2011performance edge AI systems is redefining sensor connectivity, pushing developers to deliver power\u2011 and space\u2011efficient architectures that remain secure, scalable and future\u2011ready. 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