{"id":3691,"date":"2018-01-08T07:54:18","date_gmt":"2018-01-08T07:54:18","guid":{"rendered":"https:\/\/engineernewsnetwork.com\/blog\/?p=3691"},"modified":"2018-01-07T12:55:23","modified_gmt":"2018-01-07T12:55:23","slug":"ces-2018-ai-processors-for-deep-learning-at-the-edge","status":"publish","type":"post","link":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/","title":{"rendered":"CES 2018: AI processors for deep Learning at the edge"},"content":{"rendered":"<span class=\"highlight highlight-blue\"><a href=\"https:\/\/www.ceva-dsp.com\/product\/ceva-neupro\/\" target=\"_blank\" rel=\"noopener\">CEVA<\/a><\/span> unveils\u00a0NeuPro, a powerful and specialised Artificial Intelligence (AI) processor family for deep learning inference at the edge at CES 2018, January 9-12, 2018, Las Vegas.<\/p>\n<p>The\u00a0NeuPro\u00a0family of processors is designed for smart and connected edge device vendors looking for a streamlined way to quickly take advantage of the significant possibilities that deep neural network technologies offer.<\/p>\n<p>NeuPro\u00a0builds on CEVA\u2019s industry-leading position and experience in deep neural networks for computer vision applications. Dozens of customers are already deploying the CEVA-XM4 and CEVA-XM6 vision platforms along with the CDNN neural network software framework in consumer, surveillance and ADAS products.<\/p>\n<p><a href=\"https:\/\/engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES.jpg\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-large wp-image-3695\" src=\"https:\/\/engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES-1024x354.jpg\" alt=\"\" width=\"618\" height=\"214\" srcset=\"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES-1024x354.jpg 1024w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES-800x277.jpg 800w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES-300x104.jpg 300w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro-Product-Family_HRES-768x266.jpg 768w\" sizes=\"auto, (max-width: 618px) 100vw, 618px\" \/><\/a><\/p>\n<p>This new family of dedicated AI processors offers a considerable step-up in performance, ranging from 2\u00a0Tera\u00a0Ops Per Second (TOPS) for the entry-level processor to 12.5 TOPS for the most advanced configuration.<\/p>\n<p><a href=\"https:\/\/engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1.jpg\"><img loading=\"lazy\" decoding=\"async\" class=\"alignnone size-large wp-image-3697\" src=\"https:\/\/engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1-1024x524.jpg\" alt=\"\" width=\"618\" height=\"316\" srcset=\"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1-1024x524.jpg 1024w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1-800x409.jpg 800w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1-300x153.jpg 300w, https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/CDNN_Usage_flow_HRES-1-768x393.jpg 768w\" sizes=\"auto, (max-width: 618px) 100vw, 618px\" \/><\/a>The\u00a0NeuPro\u00a0processor line extends the use of AI beyond machine vision to new edge-based applications including natural language processing, real-time translation, authentication, workflow management, and many other learning-based applications that make devices smarter and reduce human involvement.<\/p>\n<p>IlanYona, vice president and general manager of the Vision Business Unit at CEVA, commented: \u201cIt\u2019s abundantly clear that AI applications are trending toward processing at the edge, rather than relying on services from the cloud.<\/p>\n<p>\u201cThe computational power required along with the low power constraints for edge processing, calls for specialised processors rather than using CPUs, GPUs or DSPs. We designed the\u00a0NeuPro\u00a0processors to reduce the high barriers-to-entry into the AI space in terms of both architecture and software.<\/p>\n<p>\u201cOur customers now have an optimised and cost-effective standard AI platform that can be utilised for a multitude of AI-based workloads and applications.\u201d<\/p>\n<p>The\u00a0NeuPro\u00a0architecture is composed of a combination of hardware-based and software-based engines coupled for a complete, scalable and expandable AI solution. Optimizations for power, performance, and area (PPA) are achieved using a precise mix of hardware, software and configurable performance options for each application tier.<\/p>\n<p>The\u00a0NeuPro\u00a0family comprises four AI processors offering different levels of parallel processing:<\/p>\n<p>NP500 is the smallest processor, including 512 MAC units and targeting\u00a0IoT, wearables and cameras<\/p>\n<p>NP1000 includes 1024 MAC units and targets mid-range smartphones,\u00a0ADAS,\u00a0 industrial\u00a0applications and AR\/VR headsets<\/p>\n<p>NP2000 includes 2048 MAC units and targets high-end smartphones, surveillance, robots and drones<\/p>\n<p>* NP4000 includes 4096 MAC units for high-performance edge processing in enterprise surveillance\u00a0and autonomous\u00a0driving<\/p>\n<p>Each processor consists of the\u00a0NeuPro\u00a0engine and the\u00a0NeuPro\u00a0VPU.<\/p>\n<p>The\u00a0NeuPro\u00a0engine includes the hardwired implementation of neural network layers among which are convolutional, fully-connected, pooling, and activation.<\/p>\n<p>The\u00a0NeuPro\u00a0VPU is a cost-efficient programmable vector DSP, which handles the CDNN software and provides software-based support for new advances in AI workloads.<\/p>\n<p>NeuPro\u00a0supports both 8-bit and 16-bit neural networks, with an optimised decision made in real time in order to deliver the best tradeoff between precision and performance.<\/p>\n<p>The MAC units achieve better than 90% utilisation when running, ensuring highly optimised neural network performance.<\/p>\n<p>The overall processor design reduces DDR bandwidth substantially, improving power consumption levels for any AI application.<\/p>\n<p>The\u00a0NeuPro\u00a0family, coupled with CDNN, CEVA\u2019s award winning neural network software framework, provides the ultimate deep learning solution for developers to easily and efficiently generate and port their proprietary neural networks to the processor.<\/p>\n<p>CDNN supports the full gamut of layer types and network topologies, enabling fastest time-to-market.<\/p>\n<p>In conjunction with the\u00a0NeuPro\u00a0processor line, CEVA will also offer the\u00a0NeuPro\u00a0hardware engine as a Convolutional Neural Network (CNN) accelerator.<\/p>\n<p>When combined with the CEVA-XM4 or CEVA-XM6 vision platforms, this provides a flexible option for customers seeking a single unified platform for imaging, computer vision and neural network workloads.<br \/>\n<script async src=\"\/\/pagead2.googlesyndication.com\/pagead\/js\/adsbygoogle.js\"><\/script><br \/>\n<ins class=\"adsbygoogle\" style=\"display: block; text-align: center;\" data-ad-layout=\"in-article\" data-ad-format=\"fluid\" data-ad-client=\"ca-pub-7565662001938327\" data-ad-slot=\"7585079586\"><\/ins><br \/>\n<script>\n     (adsbygoogle = window.adsbygoogle || []).push({});\n<\/script><\/p>\n","protected":false},"excerpt":{"rendered":"<p>CEVA unveils\u00a0NeuPro, a powerful and specialised Artificial Intelligence (AI) processor family for deep learning inference at the edge at CES 2018, January 9-12, 2018, Las Vegas. The\u00a0NeuPro\u00a0family of processors is designed for smart and connected edge device vendors looking for a streamlined way to quickly take advantage of the significant possibilities that deep neural network &hellip;<\/p>\n","protected":false},"author":1,"featured_media":3692,"comment_status":"closed","ping_status":"open","sticky":false,"template":"","format":"standard","meta":{"footnotes":""},"categories":[168],"tags":[1785,1700,1786,1787,1784],"class_list":["post-3691","post","type-post","status-publish","format-standard","has-post-thumbnail","","category-show-time","tag-artificial-intelligence-processors","tag-ces-2018","tag-ceva","tag-neupro","tag-signal-processing-platform"],"yoast_head":"<!-- This site is optimized with the Yoast SEO plugin v27.4 - https:\/\/yoast.com\/product\/yoast-seo-wordpress\/ -->\n<title>CES 2018: AI processors for deep Learning at the edge - Engineer News Network<\/title>\n<meta name=\"robots\" content=\"index, follow, max-snippet:-1, max-image-preview:large, max-video-preview:-1\" \/>\n<link rel=\"canonical\" href=\"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/\" \/>\n<meta property=\"og:locale\" content=\"en_GB\" \/>\n<meta property=\"og:type\" content=\"article\" \/>\n<meta property=\"og:title\" content=\"CES 2018: AI processors for deep Learning at the edge - Engineer News Network\" \/>\n<meta property=\"og:description\" content=\"CEVA unveils\u00a0NeuPro, a powerful and specialised Artificial Intelligence (AI) processor family for deep learning inference at the edge at CES 2018, January 9-12, 2018, Las Vegas. The\u00a0NeuPro\u00a0family of processors is designed for smart and connected edge device vendors looking for a streamlined way to quickly take advantage of the significant possibilities that deep neural network &hellip;\" \/>\n<meta property=\"og:url\" content=\"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/\" \/>\n<meta property=\"og:site_name\" content=\"Engineer News Network\" \/>\n<meta property=\"article:published_time\" content=\"2018-01-08T07:54:18+00:00\" \/>\n<meta property=\"og:image\" content=\"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg\" \/>\n\t<meta property=\"og:image:width\" content=\"6794\" \/>\n\t<meta property=\"og:image:height\" content=\"2894\" \/>\n\t<meta property=\"og:image:type\" content=\"image\/jpeg\" \/>\n<meta name=\"author\" content=\"admin\" \/>\n<meta name=\"twitter:card\" content=\"summary_large_image\" \/>\n<meta name=\"twitter:label1\" content=\"Written by\" \/>\n\t<meta name=\"twitter:data1\" content=\"admin\" \/>\n\t<meta name=\"twitter:label2\" content=\"Estimated reading time\" \/>\n\t<meta name=\"twitter:data2\" content=\"3 minutes\" \/>\n<script type=\"application\/ld+json\" class=\"yoast-schema-graph\">{\"@context\":\"https:\\\/\\\/schema.org\",\"@graph\":[{\"@type\":\"Article\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#article\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/\"},\"author\":{\"name\":\"admin\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/#\\\/schema\\\/person\\\/4477342aea8e299c6a21761e513ea8e1\"},\"headline\":\"CES 2018: AI processors for deep Learning at the edge\",\"datePublished\":\"2018-01-08T07:54:18+00:00\",\"mainEntityOfPage\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/\"},\"wordCount\":614,\"image\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/wp-content\\\/uploads\\\/2018\\\/01\\\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg\",\"keywords\":[\"artificial intelligence processors\",\"CES 2018\",\"CEVA\",\"NeuPro\",\"signal processing platform\"],\"articleSection\":[\"Show Time\"],\"inLanguage\":\"en-GB\"},{\"@type\":\"WebPage\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/\",\"url\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/\",\"name\":\"CES 2018: AI processors for deep Learning at the edge - Engineer News Network\",\"isPartOf\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/#website\"},\"primaryImageOfPage\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#primaryimage\"},\"image\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#primaryimage\"},\"thumbnailUrl\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/wp-content\\\/uploads\\\/2018\\\/01\\\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg\",\"datePublished\":\"2018-01-08T07:54:18+00:00\",\"author\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/#\\\/schema\\\/person\\\/4477342aea8e299c6a21761e513ea8e1\"},\"breadcrumb\":{\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#breadcrumb\"},\"inLanguage\":\"en-GB\",\"potentialAction\":[{\"@type\":\"ReadAction\",\"target\":[\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/\"]}]},{\"@type\":\"ImageObject\",\"inLanguage\":\"en-GB\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#primaryimage\",\"url\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/wp-content\\\/uploads\\\/2018\\\/01\\\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg\",\"contentUrl\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/wp-content\\\/uploads\\\/2018\\\/01\\\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg\",\"width\":6794,\"height\":2894},{\"@type\":\"BreadcrumbList\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/ces-2018-ai-processors-for-deep-learning-at-the-edge\\\/#breadcrumb\",\"itemListElement\":[{\"@type\":\"ListItem\",\"position\":1,\"name\":\"Home\",\"item\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/\"},{\"@type\":\"ListItem\",\"position\":2,\"name\":\"CES 2018: AI processors for deep Learning at the edge\"}]},{\"@type\":\"WebSite\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/#website\",\"url\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/\",\"name\":\"Engineer News Network\",\"description\":\"The ultimate online news and information resource for today's engineer\",\"potentialAction\":[{\"@type\":\"SearchAction\",\"target\":{\"@type\":\"EntryPoint\",\"urlTemplate\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/?s={search_term_string}\"},\"query-input\":{\"@type\":\"PropertyValueSpecification\",\"valueRequired\":true,\"valueName\":\"search_term_string\"}}],\"inLanguage\":\"en-GB\"},{\"@type\":\"Person\",\"@id\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/#\\\/schema\\\/person\\\/4477342aea8e299c6a21761e513ea8e1\",\"name\":\"admin\",\"url\":\"https:\\\/\\\/www.engineernewsnetwork.com\\\/blog\\\/author\\\/admin\\\/\"}]}<\/script>\n<!-- \/ Yoast SEO plugin. -->","yoast_head_json":{"title":"CES 2018: AI processors for deep Learning at the edge - Engineer News Network","robots":{"index":"index","follow":"follow","max-snippet":"max-snippet:-1","max-image-preview":"max-image-preview:large","max-video-preview":"max-video-preview:-1"},"canonical":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/","og_locale":"en_GB","og_type":"article","og_title":"CES 2018: AI processors for deep Learning at the edge - Engineer News Network","og_description":"CEVA unveils\u00a0NeuPro, a powerful and specialised Artificial Intelligence (AI) processor family for deep learning inference at the edge at CES 2018, January 9-12, 2018, Las Vegas. The\u00a0NeuPro\u00a0family of processors is designed for smart and connected edge device vendors looking for a streamlined way to quickly take advantage of the significant possibilities that deep neural network &hellip;","og_url":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/","og_site_name":"Engineer News Network","article_published_time":"2018-01-08T07:54:18+00:00","og_image":[{"width":6794,"height":2894,"url":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg","type":"image\/jpeg"}],"author":"admin","twitter_card":"summary_large_image","twitter_misc":{"Written by":"admin","Estimated reading time":"3 minutes"},"schema":{"@context":"https:\/\/schema.org","@graph":[{"@type":"Article","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#article","isPartOf":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/"},"author":{"name":"admin","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/#\/schema\/person\/4477342aea8e299c6a21761e513ea8e1"},"headline":"CES 2018: AI processors for deep Learning at the edge","datePublished":"2018-01-08T07:54:18+00:00","mainEntityOfPage":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/"},"wordCount":614,"image":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#primaryimage"},"thumbnailUrl":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg","keywords":["artificial intelligence processors","CES 2018","CEVA","NeuPro","signal processing platform"],"articleSection":["Show Time"],"inLanguage":"en-GB"},{"@type":"WebPage","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/","url":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/","name":"CES 2018: AI processors for deep Learning at the edge - Engineer News Network","isPartOf":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/#website"},"primaryImageOfPage":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#primaryimage"},"image":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#primaryimage"},"thumbnailUrl":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg","datePublished":"2018-01-08T07:54:18+00:00","author":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/#\/schema\/person\/4477342aea8e299c6a21761e513ea8e1"},"breadcrumb":{"@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#breadcrumb"},"inLanguage":"en-GB","potentialAction":[{"@type":"ReadAction","target":["https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/"]}]},{"@type":"ImageObject","inLanguage":"en-GB","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#primaryimage","url":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg","contentUrl":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-content\/uploads\/2018\/01\/NeuPro_High_level_block_Diagram_with_ribbon_HRES.jpg","width":6794,"height":2894},{"@type":"BreadcrumbList","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/ces-2018-ai-processors-for-deep-learning-at-the-edge\/#breadcrumb","itemListElement":[{"@type":"ListItem","position":1,"name":"Home","item":"https:\/\/www.engineernewsnetwork.com\/blog\/"},{"@type":"ListItem","position":2,"name":"CES 2018: AI processors for deep Learning at the edge"}]},{"@type":"WebSite","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/#website","url":"https:\/\/www.engineernewsnetwork.com\/blog\/","name":"Engineer News Network","description":"The ultimate online news and information resource for today's engineer","potentialAction":[{"@type":"SearchAction","target":{"@type":"EntryPoint","urlTemplate":"https:\/\/www.engineernewsnetwork.com\/blog\/?s={search_term_string}"},"query-input":{"@type":"PropertyValueSpecification","valueRequired":true,"valueName":"search_term_string"}}],"inLanguage":"en-GB"},{"@type":"Person","@id":"https:\/\/www.engineernewsnetwork.com\/blog\/#\/schema\/person\/4477342aea8e299c6a21761e513ea8e1","name":"admin","url":"https:\/\/www.engineernewsnetwork.com\/blog\/author\/admin\/"}]}},"_links":{"self":[{"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/posts\/3691","targetHints":{"allow":["GET"]}}],"collection":[{"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/posts"}],"about":[{"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/types\/post"}],"author":[{"embeddable":true,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/users\/1"}],"replies":[{"embeddable":true,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/comments?post=3691"}],"version-history":[{"count":2,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/posts\/3691\/revisions"}],"predecessor-version":[{"id":3698,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/posts\/3691\/revisions\/3698"}],"wp:featuredmedia":[{"embeddable":true,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/media\/3692"}],"wp:attachment":[{"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/media?parent=3691"}],"wp:term":[{"taxonomy":"category","embeddable":true,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/categories?post=3691"},{"taxonomy":"post_tag","embeddable":true,"href":"https:\/\/www.engineernewsnetwork.com\/blog\/wp-json\/wp\/v2\/tags?post=3691"}],"curies":[{"name":"wp","href":"https:\/\/api.w.org\/{rel}","templated":true}]}}