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Toshiba unveils 130nm fit fast structured array development platform

Customers will benefit from high performance, low power consumption and lower costs

Toshiba announces the very first customer shipment of a new 130nm manufacturing process node based FFSA (Fit Fast Structured Array) development platform. This innovative high performance System-on-Chip (SoC) development platform delivers custom solutions that feature low power consumption at a low cost point.

Toshiba provides ASIC (Application Specific IC) and FFSA platforms that suit the customer’s business environment and technical requirements, that also deliver efficient solutions for custom SoC development.



Using an innovative approach, all FFSA devices have a common silicon-based master layer that is used in combination with upper metal layers that are reserved and allow device customisation.

The FFSA platform meets customer requirements for high performance and low power consumption; however, by limiting the customisation to just the metal layer masks, it also reduces development cost drastically.

As a result, samples and mass-produced devices can be delivered in a significantly shorter time than for conventional ASICs.

Customers using the FFSA ASIC design methodology and library secure higher performance and lower power consumption than is possible with Field Programmable Gate Arrays (FPGAs).

The new FFSA 130nm process is added to Toshiba’s current 28, 40, and 65nm process portfolio adding another option for industrial equipment. The 130nm node process offer different master slices for up to 664kb of RAM and around 912,000 gates per device.

Devices based on the new FFSA 130nm node process deliver the performance and integration needed for multiple application sectors including industrial equipment, communication technology, OA equipment and more.

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